Building trust and reliability for more than 20 years
• IP Core Development
• IP Core Customization
• FPGA Turnkey Solutions
• Product Customization Solutions
• ASIC to FPGA Solutions
• Driver Development
• Flexible Business Policy
• Excellent Customer Support
• Serving Customers For 20+ Years
• USB 1.1 Device • USB 1.1 Host
• USB 2.0 Device • USB 2.0 HUB
• USB 2.0 Host • USB 2.0 OTG
• USB3.2 GEN 1 Device • USB3.2 GEN 2x1 Device
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• Gadget Zero
• Network Control Model (NCM)
• Mass Storage
• Serial
• Remote Network Driver Interface Specification (RNDIS)
• Audio Class
• Video Class
• Mass Storage Class
• HID Class
• CDC Serial Class
• Supports High Speed (HS) and Full Speed (FS) modes
• ULPI interface to interact with external USB 2.0 PHY for HS/FS Mode
• In-built PHY implemented for USB FS Mode
• Configurable Memory depth
• Configurable to use as HOST only mode or DEVICE only mode
• Supports Control, Bulk, Isochronous and Interrupt transfers
• Supports PING protocol
• Supports SPLIT transaction for High Speed hub
• Optimized TD (Transfer Descriptor) structure
• Supports 16 Interrupt and 16 Aperiodic TDs
• Supports Control, Bulk, Interrupt and Isochronous transfers
• Capable to support up to 31 endpoints
• (1 default control endpoint + 15 IN/OUT endpoints)
• Supports software configurable endpoints
• Supports Suspend, Resume and Remote Wakeup features
• It is designed using Lattice FPGA built-in Transceiver
• Supports SuperSpeed (SS - USB3.2 Gen 1x1) mode
• Uses FPGA built-in Transceiver as a PHY layer and thus eliminates need for external PHY for USB3.1
• Supports High Speed (HS) and Full Speed (FS) modes
• ULPI interface to interact with external USB 2.0 PHY for HS/FS Mode
• In-built PHY implemented for USB FS Mode
• Simple FIFO interface to transfer data over non-control endpoint
• Integrated into the Radiant Ecosystem
• Capable to support up to 31 endpoints (1 default control endpoint, 15 IN endpoints, and 15 OUT endpoints)
• Configurable number of buffers per endpoint
• USB to Peripheral Interface Bridging
• Signal protocol conversion from USB to I2C, SPI, and GPIO
• Signal aggregation and de-aggregation over USB
• Supports USB1.1 - 12Mbps
• Uses FPGA IOs for D+/D-
• No External PHY required
• No custom driver required
• Supports Windows OS built in WinUSB Driver
• Supports Intel IOBridge Driver
• With RISC-V / Without RISC-V
• USB20 HS (480Mbps) mode can be supported using external ULPI PHY
• Easy OS porting
• USB Video Class (UVC) Compliant
• Dual MIPI Camera sensors
• Supports Uncompressed FHD (1920x1080) resolutions @30/60 fps
• Supports Intel IOBridge Driver for IO (I2C & GPIO) Control
• Full Source Code For RISC-V
• Supports USB3.2 Gen1 (5Gbps) using FPGA Transceiver
• Supports USB2.0 FS (12Mbps) using FPGA IOs for D+/D-
• Single chip solution. No External USB PHY required
• Customized USB3 Endpoint interface to use mix mode interface:
• Two Bulk EP with AHB-Lite Bus interface (I/O Aggregator)
• Two Bulk EP with FiFO interface for large data payload
• Uses Windows OS built in WinUSB & UVC Drivers
• Multiple low speed peripheral (I2C, SPI, IO etc) control over USB
• Easily updated to support Linux/MacOS
• High resolution camera development with highest frames per second
• High-speed ADC data capture for different analysis
• Factory automation
• Upgrading older USB systems to next generation USB while maintaining backward compatibility
• Video convertors (everything from SDI to USB)
• USB hard drives
• Implement EOL ASIC functionality
Single Node Single Project Perpetual License: A License for single machine in which licensee can use IP Core in single project (PCB)
Multiple Node Multiple Project Perpetual License: A License for multiple machines in which licensee can use IP Core in multiple projects (PCB)
Technical support
